1. Field of the Invention
The present invention relates to a plasma display apparatus and a method of driving the same.
2. Description of the Background Art
In general, a plasma display panel excites phosphor due to 147 nm ultraviolet rays generated when an inert gas such as a combination of helium and xenon (He+Xe) or neon and xenon (Ne+Xe) is discharged, thereby displaying an image including characters and graphics.
FIG. 1 is a perspective view illustrating a structure of a general plasma display panel. As shown in FIG. 1, the plasma display panel comprises a scan electrode 12A and a sustain electrode 12B formed on an upper substrate 10, and a data electrode 20 formed on a lower substrate 18.
The scan electrode 12A and the sustain electrode 12B include a transparent electrode and a bus electrode, respectively. The transparent electrode is made of Indium-Tin-Oxide (ITO). The bus electrode is made of metal for reducing resistance.
An upper dielectric layer 14 and a protection layer 16 are sequentially laminated on the top of the upper substrate 10 on which the scan electrode 12A and the sustain electrode 12B are formed.
Wall charge is charged on the upper dielectric layer 14, the wall charge being generated when plasma is discharged. The protection layer 16 prevents the upper dielectric layer 14 from damaging due to sputtering generated when plasma is discharged and enhances efficiency of second electron emission at the same time. The protection layer 16 is usually made of magnesium oxide (MgO).
Meanwhile, the lower dielectric layer 22 and a barrier rib 24 are sequentially formed on the top of the lower substrate 18 on which the data electrode is formed. A phosphor layer 26 is coated on the surface of the lower dielectric layer 22 and the barrier rib 24.
The data electrode 20 is formed in the direction to cross the scan electrode 12A and the sustain electrode 12B. The barrier rib 24 is formed parallel with the data electrode 20 to prevent ultraviolet rays and visible rays generated by discharge from being leaked to adjacent discharge cells.
The phosphor layer 26 is excited due to ultraviolet rays generated when plasma is discharged to generate any one visible ray of red, green and blue. An inert gas for discharge such as a combination of helium and xenon (He+Xe) or neon and xenon (Ne+Xe) is injected in discharge space of a discharge cell formed between the upper/lower substrate 10 or 18 and the barrier rib 24.
FIG. 2 is a driving waveform illustrating a method of driving a conventional plasma display panel. Referring to FIG. 2, the conventional plasma display panel is driven by being divided into a reset period for initializing the whole picture, an address period for selecting discharge cells and a sustain period for sustaining discharge of selected cells.
First, the reset period is driven by being divided into a setup period (SU) and a setdown period (SD). In the setup period, a rising ramp waveform (Ramp-up) is simultaneously applied to all the scan electrodes (Y), and discharge is generated within the cells of the whole picture due to the rising ramp waveform (Ramp-up). Further, positive wall charge is charged on the address electrodes (X) and the sustain electrodes (Z), and negative wall charge is charged on the scan electrodes (Y) due to the setup discharge. In the setdown period (SD), a rising ramp waveform (Ramp-up) generates weak erasing discharge within the cells, thereby erasing a portion of the overcharged wall charge, the rising ramp waveform (Ramp-up) falling from a positive voltage lower than the peak voltage of the ramp-up waveform to a ground voltage (GND) or a negative specific voltage level after the rising ramp waveform (Ramp-up) is applied. Wall charge uniformly remains within the cells to a degree in that address discharge can stably be generated by the setdown discharge.
In the address period, a negative scan pulse (Scan) is sequentially applied to the scan electrodes (Y) and simultaneously synchronized with the scan pulse so that a positive data pulse (data) is applied to the address electrodes (X). The difference between the scan pulse and the data pulse, and the voltage of the wall charge generated in the reset period are added so that address discharge is generated within the cell to which the data pulse is applied. Wall charge remains within the cells selected due to the address discharge to a degree in that discharge can be generated when a sustain voltage is applied. A positive direct current voltage (Zdc) is applied to the sustain electrode Z so that the sustain electrode (Z) does not cause wrong discharge with the scan electrode (Y) by reducing the voltage difference with the scan electrode (Y) during the setdown and the address periods.
In the sustain period, a sustain pulse (Sus) is alternately applied to the scan electrodes (Y) and the sustain electrodes (Z). The voltage of the wall charge within the cell and the sustain pulse are added to the cell selected due to the address discharge so that sustain discharge, that is, display discharge is generated between the scan electrode (Y) and the sustain electrode (Z) whenever each sustain pulse is applied. Further, after the sustain discharge is completed, a ramp waveform (Ramp-ers) having a small pulse width and a voltage level is applied to the sustain electrode (Z) so that wall charge remaining within the cells of the whole picture is erased.
FIG. 3 is a circuit diagram illustrating operation of a driving circuit driven during an address period in a conventional plasma display panel.
Referring to FIG. 3, if a channel corresponding to a first scan electrode (Y1) is selected in a scanning process during the address period, channels corresponding to the rest of the scan electrodes (Y2, Y3, . . . , Yn) are not selected.
If a channel is selected in such a manner, a second switching element 213-1 of a first scan driver 210-1 corresponding to the selected channel and a switching element 220 for scanning are turned on.
At the same time, a first switching elements 211-2 to 211-n of scan drivers 210-2 to 210-n corresponding to the channels which are not selected and a switching element 230 for grounding are turned on.
If the switching elements operate in such a manner and a data voltage (+Vd or 0V) is applied to data electrodes (X1 to Xm) due to operations of first data switching elements 310-1 to 310-m or second data switching elements 320-1 to 320-m of a data driver IC 300. Therefore, write operations are performed within cells located on a first line.
Further, a data pulse is grounded via the first switching elements 211-2 to 211-n of the scan drivers 210-2 to 210-n corresponding to the rest of the scan electrodes (Y2 to Yn) and the switching element 230 for grounding.
If such a process is performed on all the scan electrodes, a scanning process is finished.
Meanwhile, a first switching element 240 for sustaining, second switching elements 213-2 to 213-n of the scan drivers 210-1 to 210-n and a switching element 260 for grounding are turned on after the scanning process.
Accordingly, a first sustain voltage (+Vsy), the first switching element 240 for sustaining, the second switching elements 213-2 to 213-n of the scan drivers 210-1 to 210-n, each of the scan electrodes (Y1 to Yn), the sustain electrodes (Z1 to Zn) and the switching element 260 for grounding make a loop so that the sustain voltage (+Vsy) is applied to the scan electrodes (Y1 to Yn).
Next, a second switching element 250, the first switching elements 211-2 to 211-n of the scan drivers 210-1 to 210-n and the switching element 230 for grounding are turned on.
Accordingly, a second sustain voltage (+Vsz), the sustain electrodes (Z1 to Zn), the scan electrodes (Y1 to Yn), the first switching elements 211-2 to 211-n of the scan drivers 210-1 to 210-n and the switching element 230 for grounding make a loop so that the sustain voltage (+Vsz) is applied to the sustain electrodes (Z1 to Zn).
Such a driving apparatus of the plasma display panel applies a scan voltage (−Vyscan) and a data voltage (+Vd or 0V) to corresponding electrodes through switching operations of switching elements included in the scan drivers 210-1 to 210-n and data driver ICs 300-1 to 300-m in the scan period, and a displacement current (Id) flows in the data driver ICs 300-1 to 300-m through the data electrodes in this process.
Since a general plasma display panel has a three-electrode structure, a first equivalent capacitor (Cm1) exists between two data electrodes adjacent to each other, and a scond equivalent capacitor (Cm2) exists between a data electrode and a scan electrode, or a data electrode and a sustain electrode as shown in FIG. 3
Thus, since the state of a voltage applied to the electrodes varies depending on the operations of the switching elements included in the scan drivers 210-1 to 210-n and the data driver ICs 300-1 to 300-m in a scanning process, the displacement current (Id) generated due to the first equivalent capacitor (Cm1) and the second equivalent capacitor (Cm2) flows in the data driver ICs 300-1 to 300-m) through the data electrodes.
However, a displacement current flowing in such data driver ICs 300-1 to 300-m and a magnitude of electric power according thereto vary depending on image data applied to the data electrodes (X1 to Xm).
The magnitude of a displacement current flowing in such data driver ICs 300-1 to 300-m can be expressed in equation 1 as follows:id=C×(dv/dt)×f  EQUATION 1
“id” means the magnitude of a displacement current flowing through a data electrode, “C” means a capacitance between two data electrodes adjacent to each other, a data electrode and a scan electrode, or a data electrode and a sustain electrode, “dv/dt” means the variation of a voltage per time in a data electrode, and “f” means the number of voltage variance times of a data electrode.
FIG. 4 is a waveform of an image signal in which a displacement current generated in a conventional plasma display panel becomes maximized.
As shown in FIG. 4, a placement current calculated with the equation becomes the largest when the phase difference between image data applied to data electrodes in case that a scan electrode is scanned and image data applied to the data electrodes in case that the next scan electrode is scanned is 1/2 period.
In other words, in case that such image data are applied, an electric potential of a data electrode varies from a data voltage (Vd) to a ground level or from a ground level to a data voltage (Vd) whenever each scan electrode is scanned as shown in FIG. 2. In this case, since the capacitance “C” and “f” of the equation becomes maximized, the magnitude of a displacement current (id) becomes maximized. In case that such a maximized displacement current (id) flows in the data driver ICs 300-1 to 300-m shown in FIG. 3, there is a drawback in that the data driver ICs 300-1 to 300-m becomes damaged.
Meanwhile, in case that a driver IC which has an excellent withstand voltage property is used to prevent a maximized displacement current from flowing in the data driver IC 300-1 to 300-m, there is a drawback in that a manufacturing cost is considerably increased.
FIG. 5 is a view illustrating a picture displayed due to image data in which a displacement current generated in a conventional plasma display panel becomes maximized.
As shown in FIG. 5, the image data picture, in which a displacement current becomes maximized, has a lattice pattern. Thus, a maximized displacement current (id) is generated if an image data with the lattice pattern is input. As shown in FIG. 6, such a lattice pattern is used for a dither mask of 4/8 level used in a dithering process for enhancing a picture quality in a conventional plasma display panel. Therefore, since a maximized displacement current is generated in all the plasma display panels for enhancing picture quality by using a dithering process, there is more frequently generated damage of data driver ICs.